Run time dynamic power determination has become critical in power and thermal constraint applications. Dynamic power refers to power consumed due to signal transitions due to running applications. Reliable dynamic power estimation enables circuits to deliver maximum performance while operating within power, thermal and power supply limits. Circuits known as dynamic power meters may be provided, along with a circuit whose dynamic power consumption is to be determined. The dynamic power meter circuit and the circuit it is monitoring may be parts of the same larger overall integrated circuit. If the circuit to be monitored is a processor, for example, then the processor may involve what are referred to as event counters or event registers. Event counters may also be referred to in the dynamic power meter arts as performance counters or hardware performance counters (HPCs) or performance monitoring counters (PMCs). The terms event counter and event register are used here.
When the processor performs a particular task or otherwise operates such that a particular “event” occurs, then a record of the event occurring is captured in a corresponding event counter or event register. A processor executing instructions may, for example, have a plurality of hardware event counters. One hardware event counter may, for example, increment each time the processor performs a particular type of complex instruction such as a floating point multiply. Another event counter may, for example, increment each time another type of event such as a cache miss occurs. Another event counter may, for example, increment each time a bus transaction occurs. A processor may have many such event counters or registers. The events being monitored and logged are typically microarchitectural events. The occurrence and/or frequency at which these microarchitecture events occur can be used as an indirect measure of the dynamic power being consumed by the processor. If, for example, the processor is idle and not executing instructions or is only performing a light processing load, then the actual power consumption of the processor may be known to be low, whereas if the same processor is doing heavy computational work and doing a lot of floating point multiplies and is experiencing a lot of cache misses and bus transactions and other microarchitectural events, then the actual power consumption of the processor may be known to be high. The dynamic power meter circuit reads or otherwise accesses the event counters and registers, and from the values of the event counters and registers makes an indirect determination or estimation of the dynamic power consumption of the processor, and then outputs a digital value indicative of the dynamic power consumption of the circuit. However, the accuracy and time resolution of such conventional methods is often unsatisfactory, especially for critical applications such as power supply over-current protection as well as reducing sudden load current increase induced voltage droop.